The present invention relates to a switching power supply unit, and more particularly to a synchronous rectifying switching power supply unit, a switching power supply unit having a half-bridge circuit, and a switching power supply unit using a plurality of converters connected in series.
(Related Art 1)
Conventionally, DC/DC converters are known as a switching power supply unit. A typical DC/DC converter converts an alternating current input to direct current once by using a switching circuit, then transforms (boosting or lowering) the voltage by using a transformer, and further converts the direct current to alternating current by using an output circuit, whereby alternating current output having voltage different from the input voltage can be obtained.
In some cases, switching elements such as transistors are employed in an output rectifier for use in the DC/DC converter, so that the switching elements may be synchronously controlled with the switching circuit on the input side. The DC/DC converter having such an output rectifier is generally called as a synchronous rectifying switching power supply unit.
FIG. 15 is a circuit diagram of a conventional synchronous rectifying switching power supply unit.
As shown in FIG. 15, the conventional switching power supply unit includes a transformer 1, a half-bridge circuit 2 provided on the primary side of the transformer 1, a rectifier circuit 3 provided on the secondary side of the transformer 1, a rectifier-transistor driving circuit 4 provided on the secondary side of the transformer 1, a smoothing circuit 5 provided at the following stage of the rectifier circuit 3, and a control circuit 9 for controlling on/off of a first main switch 7 and a second main switch 8 provided in the half-bridge circuit 2 based on the result of monitoring output voltage Vo via an insulating circuit 6.
The half-bridge circuit 2 includes a first input capacitor 11 and a second input capacitor 12 connected in series between both ends of an input power supply 10 in addition to the first and second main switches 7 and 8. The primary winding 20 of the transformer 1 is connected between a node where the first and second main switches 7 and 8 are joined and a node where the first and second input capacitors 11 and 12 are joined. The rectifier circuit 3 has a first rectifier transistor 13 and a second rectifier transistor 14. The drain of the first rectifier transistor 13 is connected to the first secondary winding 21 of the transformer 1, whereas the drain of the second rectifier transistor 14 is connected to the second secondary winding 22 of the transformer 1. As shown in FIG. 15, as the source of the first rectifier transistor 13 and the source of the second rectifier transistor 14 are short-circuited, a voltage waveform appearing between the common source node of both transistors and a node where the first and second secondary windings 21 and 22 of the transformer 1 are joined forms an output from the rectifier circuit 3. The rectifier-transistor driving circuit 4 has a first diode 15 connected between the gate and source of the second rectifier transistor 14 and a second diode 16 connected between the gate and source of the first rectifier transistor 13. The third secondary winding 23 of the transformer 1 is connected between the cathode of the first diode 15 and the cathode of the second diode 16. Further, the smoothing circuit 5 has a smoothing inductor 17 and a smoothing capacitor 18.
With the arrangement above, the first and second main switches 7 and 8 are turned on alternately under the control of the control circuit 9 at intervals of predetermined dead time, whereby the output voltage Vo determined by the input voltage Vin and the turn ratio of the transformer 1 is applied to a load 19.
FIG. 16 is a timing chart showing the operation of the conventional synchronous rectifying switching power supply unit. In FIG. 16, Vgs7 and Vgs8 mean the gate-source voltages of the first and second main switches 7 and 8 respectively; Vds13 and Vds14 mean the source-drain voltages of the first and second rectifier transistors 13 and 14 respectively; and Vgs13 and Vgs14 means the gate-source voltages of the first and second rectifier transistors 13 and 14 respectively.
As shown in FIG. 16, in the conventional synchronous rectifying switching power supply unit, the first and second main switches 7 and 8 are driven alternately under the control of the control circuit 9 at intervals of predetermined dead time, and in response to the operation, the secondary voltage is generated across the source and drain of the second rectifier transistor 14 during the interval the first main switch 7 is xe2x80x9conxe2x80x9d, whereas the secondary voltage is generated across the source and drain of the first rectifier transistor 13 during the interval the second main switch 8 is xe2x80x9conxe2x80x9d.
In this case, in the rectifier-transistor driving circuit 4, the first diode 15 is turned on during the interval the first main switch 7 is xe2x80x9conxe2x80x9d and the second diode 16 is turned on during the interval the second main switch 8 is xe2x80x9conxe2x80x9d. Consequently, during the interval the first main switch 7 is xe2x80x9conxe2x80x9d, the gate-source channel of the first rectifier transistor 13 is driven and turned on, and during the interval the second main switch 8 is xe2x80x9conxe2x80x9d, the gate-source channel of the second rectifier transistor 14 is driven and turned on. Further, as the gate of the first rectifier transistor 13 and the gate of the second rectifier transistor 14 are short-circuited via the third secondary winding 23 of the transformer 1 during the interval the first and second main switches 7 and 8 both are xe2x80x9coffxe2x80x9d, the gate-source voltages of the first rectifier transistor 13 and the second rectifier transistor 14 each become intermediate voltages.
As the first rectifier transistor 13 is turned on during the whole interval the second main switch 8 is xe2x80x9coffxe2x80x9d and as the second rectifier transistor 14 is turned on during the whole interval the first main switch 7 is xe2x80x9coffxe2x80x9d, no current is practically allowed to flow into the body diode of the first rectifier transistor 13 and the body diode of the second rectifier transistor 14, so that rectification can be carried out with a small loss.
(Related Art 2)
There have been proposed so-called two-stage converters for electronic systems like computers and as one example of a switching power supply unit for efficiently and stably supplying voltage, a preceding-stage buck converter and a following-stage half-bridge converter are combined in such a two-stage converter.
The buck converter is used for stepping down input voltage to a certain voltage level, whereas the half-bridge converter employs a half-bridge circuit for converting the input voltage to AC voltage, insulating, rectifying and smoothing the AC voltage to generate DC voltage.
A rectifying-smoothing circuit comprises a self-drive type synchronous rectifying circuit formed with a synchronous rectifying switch element connected to the secondary winding side of a transformer, capacitors and an inductor.
As described in a document under the title of xe2x80x9cBuck+Halfbridge (d=50%) Topology Applied to very Low Voltage Power Convertersxe2x80x9d by P. Alou, J. Oliver, J. A. Cobos, O. Garcia and J. Uceda in the IEEE Applied Power Electronics Conference (APEC), 2001, a two-stage converter arrangement is made through the steps of fixing to 50% the duty ratio of a main switch element provided in a following-stage half-bridge converter and controlling the duty ratio of a switching element provided in a preceding-stage buck converter so as to make the duty ratio of the switching element variable in accordance with output voltage.
(Related Art 3)
There has been proposed a technique recently for exciting the primary winding of a transformer by using a half-bridge circuit, wherein a buck converter circuit and the half-bridge circuit are connected in series as the primary circuit of a switching power supply unit; and the buck converter circuit is used to step down input voltage Vin and supply the input voltage thus stepped down to the half-bridge circuit (Buck+Half Bridge (d=50%) Topology applied to Very Low Voltage Power Converters, IEEE APEC, 2001, Session 19.4).
When these circuits above are used as the primary circuit of the switching power supply unit, control is exerted so that the duty of a switching element provided in the half-bridge circuit is fixed to a predetermined quantity and that the duty of a switching element provided in the buck converter circuit is set to a predetermined quantity according to output voltage Vo. As comparatively low voltage is thus obtainable efficiently and stably as the output voltage Vo, this switching power supply unit is most suitable usable as a power supply for computers, for example.
FIG. 17 is a circuit diagram of a conventional switching power supply unit having such a primary circuit as described above.
As shown in FIG. 17, the conventional switching power supply unit includes a transformer 51, a buck converter circuit 53 connected to an input power supply 52, a half-bridge circuit 54 that is connected to the buck converter circuit 53 and used for exciting the primary winding of the transformer 51, a rectifier circuit 55 provided on the secondary side of the transformer 51, a smoothing circuit 57 provided at the following stage of the rectifier circuit 55 and connected to a load 56, and a control circuit 63 for monitoring output voltage Vo via an insulating circuit 58 and performing on/off control over a first and a second main switch 59 and 60 provided in the buck converter circuit 53 according to the monitored result and performing on/off control over a third and a fourth main switch 61 and 62 provided in the half-bridge circuit 54.
The buck converter circuit 53 has an inductor 64 in addition to the first and second main switches 59 and 60; the half-bridge circuit 54 has a first and a second input capacitor 65 and 66 connected in series across the output terminal of the buck converter circuit 53 in addition to the third and fourth main switches 61 and 62; and the primary winding of the transformer 51 is connected between a node where the third and fourth main switches 61 and 62 are joined and a node where the first and second input capacitors 65 and 66 are joined. Further, the rectifier circuit 55 has a first and a second diode 67 and 68; and the smoothing circuit 57 has a smoothing inductor 69 and a smoothing capacitor 70. The rectifier circuit 55 and the smoothing circuit 57 constitute an output circuit.
With the arrangement above, the first and second main switches 59 and 60 provided in the buck converter circuit 53 are alternately turned on with predetermined dead time held therebetween under control of the control circuit 63, whereby the constant internal voltage Vin2 determined by the duties of input voltage Vin1 and the first and second main switches 59 and 60 appears across the output terminal of the buck converter circuit 53. On the other hand, the third and fourth main switches 61 and 62 provided in the half-bridge circuit 54 are alternately turned on/off with a predetermined quantity of duty under control of the control circuit 63. Thus, the constant output voltage Vo determined by the internal voltage Vin2 and the turn ratio of the transformer 51 is given across the load 56.
Regarding the first related art, what has been described above refers to ideal operation, and in actual circuits, there unavoidably occurs a slight delay in the timing of operations of the first rectifier transistor 13 and the second rectifier transistor 14. Ideally, the first rectifier transistor 13 is turned off simultaneously at the timing (time t0) the secondary voltage is generated across the source and drain of the secondary rectifier transistor 13, and the second rectifier transistor 14 is turned off simultaneously at the timing (time t1) the secondary voltage is generated across the source and drain of the secondary rectifier transistor 14. Actually, however, the timing the first rectifier transistor 13 is turned off slightly delays behind the time t0 and the timing the second rectifier transistor 14 is turned off slightly delays behind the time t1.
For the reason above, a through current flows into the first rectifier transistor 13 in a brief interval of time after the secondary voltage is generated across the source and drain of the first rectifier transistor 13, and similarly, through current flows into the second rectifier transistor 14 in a brief interval of time after the secondary voltage is generated across the source and drain of the second rectifier transistor 14. The through currents result in power loss and the problem is that the lowering of conversion efficiency is caused to the whole switching power supply unit.
In the two-stage converter as described in the second related art, current flowing through a synchronous rectifying switch element on the secondary winding side of a transformer is caused to have a commutation period due to the leakage inductance of the transformer provided in the half-bridge circuit and then voltage is generated across both ends of the synchronous rectifying switch element.
In case where the commutation period is longer than delay in the operation of the synchronous rectifying switch element (turn on/off period), through current flows as the synchronous rectifying switch elements are simultaneously turned on and the synchronous rectifying switch elements may be damaged when the worst comes to the worst.
Particularly in the case of a low ON resistant synchronous rectifying switch element, operation-delay time tends to become longer, this phenomenon appears conspicuously.
Although this problem can be dealt with by coarsely coupling the transformer in order to increase the leakage inductance and prolong the commutation period. However, power loss may increase caused by the increase of the interval that the synchronous rectifying switch element cannot be turned on, and further, there may be brought about a bad influence resulting from an increase in loss because of the leakage inductance and spike noise.
The synchronous rectifying switch elements can be prevented from being simultaneously turned on by adding to the half-bridge circuit a drive timing circuit for controlling the timing that the synchronous rectifying switch element is operated. However, the problem in this case is that a switching power supply unit tends to become large-sized accompanied with an increase in cost as the number of parts increases.
Regarding the third related art, a user may be requested to be able to switch the values of the output voltage Vo in order to have different kinds of loads driven by one kind of switching power supply unit. In case where the user is allowed to switch the output voltage Vo between 3.3V and 1.5V, a step-down range to be covered by the buck converter circuit 3 as the first stage converter grows larger, and the load of the buck converter circuit 3 is heavy when lower voltage (e.g., 1.5V) is required as the output voltage Vo, and the problem is that loss tends to increase.
In case where a lower value of the output voltage Vo is set by the user, the output voltage Vo can be lowered by reducing not only the duty of the buck converter circuit 3 but also the duty of the half-bridge circuit 4 as a second stage converter. In this case, however, the stability of the output voltage Vo may be ruined because a plurality of converters operate to stabilize the output voltage Vo. In order to prevent the stability of the output voltage Vo from being ruined, the converter-to-converter operation needs to be properly regulated, which results in complicating the control operation. Particularly when transistors as rectifying elements constituting a rectifier circuit are used and turned on/off by utilizing the secondary voltage of the transformer 1, the loss produced in the rectifier circuit tends to increase because the dead time of the half-bridge circuit 4 fluctuates as the duty of the half-bridge circuit 4 fluctuates. In case where the duty of the half-bridge circuit 4 is lowered in response to a demand for lower voltage (e.g., 1.5V) as the output voltage Vo, the dead time of the half-bridge circuit 4 increases, whereby the interval during which no voltage is generated on the secondary side of the transformer 1 becomes longer. Consequently, as the conducting period of the rectifier transistors constituting the rectifier circuit becomes shortened, current is allowed to flow into the body diodes over a long period of time.
It is therefore an object of the invention to provide a switching power supply unit adapted to effectively prevent the generation of through currents.
Another object of the invention is to provide a switching power supply unit capable of substantially improving the reliability of a self-drive type secondary rectifier circuit and also forming a highly efficient power supply at low cost.
Still another object of the invention is to provide a switching power supply unit which uses a plurality of converters connected in series and is capable of properly switching output voltage Vo from a high level to a low level.
Another object of the invention is to provide a switching power supply unit which uses a plurality of converters connected in series and is capable of switching output voltage Vo from a high level to a lower under a simple type of control.
Still another object of the invention is to provide a switching power supply unit which uses a plurality of converters connected in series and is capable of switching output voltage Vo from a high level to a lower level while suppressing an increase in the loss generated in a rectifier circuit.
The object of the invention is accomplished by a switching power supply unit comprising a transformer, a switching circuit provided on the primary side of the transformer, a synchronous rectifier circuit which is provided on the secondary side of the transformer and has at least a rectifier transistor, a rectifier-transistor driving circuit which is provided on the secondary side of the transformer and forms a first control signal synchronous with the switching operation of the switching circuit, and a timing generating circuit for forming a second control signal which exceeds the threshold voltage of the rectifier transistor at a timing substantially equal to the timing one edge of the first control signal is generated on receiving the first control signal and which falls below the threshold voltage of the rectifier transistor at a timing earlier by predetermined time than the timing the other edge of the first control signal is generated and for supplying the resulting second control signal to the control electrode of the rectifier transistor.
As the off timing of rectifier transistor is hastened by the timing generating circuit according to the invention, the generation of through currents can effectively be prevented, whereby the conversion efficiency of the whole switching power supply unit is enhanced because power loss is reducible.
According to an embodiment of the invention, the waveform of the first control signal is a waveform alternately repeating a first potential, a second potential and an intermediate potential inserted in between the first and second potentials, the one edge of the first control signal being defined by the timing the one edge varies from the first potential to the intermediate potential, the other edge of the first control signal being defined by the timing the other edge varies from the intermediate potential to the first potential.
According to another embodiment of the invention, during the interval the first control signal varies from the intermediate potential to the first potential after the first control signal varies from the second potential to the intermediate potential, the voltage of the second control signal falls below the threshold voltage of the rectifier transistor.
According to another embodiment of the invention, the timing generating circuit includes first means for, on receiving the first control signal, forming an intermediate signal which varies from a first logical level to a second logical level in response to the one edge of the first control signal and varies from the second logical level to the first logical level in response to the variation of the first control signal from the second potential to the intermediate potential; and second means for, on receiving the intermediate signal, forming the second control signal by providing a delay to the variation of the intermediate signal from the second logical level to the first logical level.
According to another embodiment of the invention, the first means includes a divider circuit for dividing the first control signal, a delay circuit for delaying the output signal of the divider circuit, and a comparator for comparing the first control signal with the output signal of the delay circuit whereby to form the intermediate signal.
According to another embodiment of the invention, the delay circuit includes a first time-constant circuit for providing a delay to the one-directional variation of the output signal of the divider circuit, and a second time-constant circuit for providing a delay to the reverse-directional variation of the output signal of the divider circuit.
According to another embodiment of the invention, the time constant of the first time-constant circuit is set so that the potential of the output signal of the delay circuit rises above at least the intermediate potential at the timing the first control signal varies from the second potential to the intermediate potential and wherein the time constant of the second time-constant circuit is set so that the potential of the output signal of the delay circuit falls below at least the intermediate potential at the timing the first edge of the first control signal is generated.
According to another embodiment of the invention, the switching circuit is one selected from a half-bridge circuit, a full-bridge circuit, a push-pull circuit and an active clamping circuit.
The object of the invention is accomplished further by the switching power supply unit comprising a switching circuit which is connected to an input power supply and has a first and a second main switch which alternately conduct at intervals of dead time, a first rectifier transistor for performing rectifying operation during the interval the second main switch remains non-conducting and a second rectifier transistor for performing rectifying operation during the interval the first main switch remains non-conducting, and means for driving the first and second rectifier transistors, wherein the means is used to supply an ON signal to the control electrode of the first rectifier transistor over the substantially whole period of first dead time to be inserted and also to supply the ON signal to the electrode of the second rectifier transistor for a part of period of the first dead time when the conducting main switch is switched from the second main switch to the first main switch and wherein the means is used to supply the ON signal to the control electrode of the second rectifier transistor over the substantially whole period of second dead time to be inserted and also to supply the ON signal to the electrode of the first rectifier transistor for a part of period of the second dead time when the conducting main switch is switched from the first main switch to the second main switch.
Even according to this invention, the generation of through currents can effectively be prevented, whereby the conversion efficiency of the whole switching power supply unit is enhanced because power loss is reducible.
According to an embodiment of the invention, a part of period of the first dead time is a consecutive period including the timing of starting the first dead time and wherein a part of period of the second dead time is a consecutive period including the timing of starting the second dead time.
In order to solve the foregoing problems, a switching power supply unit according to the invention includes a first and a second switching element which are provided on the primary winding side of a transformer and connected to a power supply in series, a converter having a first and a second synchronous rectifying switch element which are connected to the secondary winding side of the transformer in series, and a driving circuit for controlling the operation of the first and second switching elements and generating a first and a second control signal having a dead time period in which the first and second switching elements are not conducting.
According to the invention, since the first and second synchronous rectifying switch elements can surely be prevented from being simultaneously turned on and since the commutation derived from the leakage inductance of the transformer can be controlled in an optimum manner, it becomes possible to materialize low-cost, reliable and low-cost switching power supply unit.
The object of the invention is accomplished by a switching power supply unit including a transformer, a first and a second converter connected between a supply input terminal and the primary winding of the transformer in series, an output circuit connected to the secondary winding of the transformer, and control circuits for controlling the operation of the first and second converters, wherein the control circuits are used for controlling the first converter in terms of duty and also controlling the second converter in terms of frequency.
According to the invention, the first converter is controlled in terms of duty, whereas the second converter is controlled in terms of frequency, whereby even when switching of output voltage is requested by a user, the switching operation can simply be controlled.
According to an embodiment of the invention, the control circuit controls the duty of the first converter according to the present output voltage outputted from the output circuit and controls the operating frequency of the second converter according to the set value of the present output voltage, regardless of the present output voltage.
According to another embodiment of the invention, as the first converter and the second converter share their roles with each other, it is unnecessary to coordinate both the converters closely.
According to another embodiment of the invention, further, the control circuit controls the second converter so that dead time is made constant, regardless of the operating frequency.
According to the another embodiment of the invention, further, a self-drive type synchronous rectifier circuit formed with rectifier transistors is contained in the output circuit and wherein the dead time is set substantially equal to an interval resulting from subtracting a commutation period due to leakage from the transformer from delay time in the operation of the rectifier transistors.
According to another embodiment of the invention, further, the loss generated in the output circuit can effectively be suppressed while through current is prevented from being generated.
According to another embodiment of the invention, further, the first converter is a buck converter circuit and the second converter is a half-bridge circuit.